| PART |
Description |
Maker |
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| CD4013BMS CD4013BE CD4013 FN3080 |
D-Type Flip Flop, Dual, Rad-Hard, CMOS, Logic
From old datasheet system
CMOS Dual ‘D’-Type Flip-Flop
CMOS Dual ??Type Flip-Flop
IC-4000CMOS
CMOS Dual D-Type Flip-Flop
CMOS Dual ‘D?Type Flip-Flop
|
INTERSIL[Intersil Corporation]
|
| MC14027 MC14027B MC14027BCP MC14027BD MC14027BDR2 |
Dual J-K Flip-Flop 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
TE Connectivity, Ltd.
ONSEMI[ON Semiconductor]
|
| 5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation
Intersil, Corp.
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear
Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| DM74AS74 DM74AS74SJX DM74AS74M DM74AS74N DM74AS74S |
Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear AS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| MC10H131FNG MC10H131FN MC10H13106 MC10H135FNG MC10 |
Dual D Type Master?Slave Flip?Flop
Dual D Type Master−Slave Flip−Flop
Dual J?K Master?Slave Flip?Flop
Universal Hexadecimal Counter
Four?Bit Universal Shift Register
Quad 2?Input Multiplexer (Non?Inverting)
12?Bit Parity Generator?Checker
Binary to 1?8 Decoder (Low)
Binary to 1?8 Decoder (High)
8?Line Multiplexer
8?Input Priority Encoder
5?Bit Magnitude Comparator
Dual Binary to 1?4?Decoder (High)
|
ONSEMI[ON Semiconductor]
|
